The following is a block diagram of a 4 bit adder like that found in a 7483 IC. It takes two 4-bit binary numbers in (plus a carry-in) and gives the addition of the two numbers as a 5-bit binary word (4-bit sum and a carry-out).
a) Write a Verilog code to implement the above 4-bit adder circuit.
Use switches SW[3], SW[2], SW[1] and SW[0] to input binary number x3 x2 x1 x0 and SW[9], SW[8], SW[7] and SW[6] to input binary number y3 y2 y1 y0.
Display Outputs
Use BCD to SSD converter technique you implemented in Lab 3 to convert and display the inputs y4 y3 y2 y1 on the SSD HEX[3] and HEX[2] and x4 x3 x2 x1 on the SSD HEX[1] and HEX[0].
Display Outputs
Use the BCD to SSD converter to convert the output from the adder - c4 s4 s3 s2 s1. When converted to BCD it needs 2 digits to display the number in decimal format. Therefore you will need two SSD displays. Use HEX[5] and HEX[4] to show each input and output as specified above. If any number is less than 10 the higher decimal should be blank – not zero.
This should be done in several modules. For example a top module, a bitwise full adder module, an adder module for all four bits, a module to convert the binary number to BCD, and a module to output the numbers to the 7-segment display. If desired, you may use previous code that you have written.
