In this part, students will work on developing a digital circuit (Circuit 1) shown below using behavioral VHDL. This circuit is also described in detail in course’s Intro to VHDL Lecture. For the following design, students should develop a separate behavioral VHDL program and develop a simple testbench to verify the functionality of design.
Part II. 4-bit Adder/Subtractor
In this part, based on the knowledge learned from Lab 1 and Intro to VHDL Lecture, you will be using VHDL programming and Xilinx Vivado IP Integrator tool to design a simple 4-bit adder/subtractor.
As we discussed in previous Lab, first, you need to develop the required 1-bit logical components using VHDL, and then use them to construct the larger design (4-bit adder-subtractor) using Vivado IP Integrator. Lastly, you need to develop a testbench to verify your design using the simulation results and generated waveforms.
