Part 1 (Building a 3-bit 2x1 MUX)
For this part, you will design the circuit in Figure 1 and implement it on the Nexys board. The circuit implements a 2x1 MUX with 3-bit inputs and outputs. In other words, the inputs X, Y and output M are all 3-bit signals.
1.write Verilog code to describe a 2x1 MUX with 1-bit inputs and outputs (you can use dataflow orbehavioral modeling for this item). Call the file
`mux_2x1_simple`
2.Use the `mux_2x1_simple` to implement a 3-bit input/output 2x1 MUX as shown in Figure 1. In other words, instantiate several instances of the
`mux_2x1_simple` module to create the 3-bit version. Call the file `mux_2x1_3bit`
3.Verify the functionality of your code by implementing
it on the Nexys board using the following IO Figure 1: 2x1 MUX specifications:
a. SW2 ß SW0 for the input X
b. SW5 ß SW3 for the input Y
c. SW15 for the select signal
d. LED2 ß LED0 for the output M
e. LED15 to reflect the status of the select signal
Part 2 (Building a 3-bit 4x1 MUX)
For this part, you will use several instances of the
`mux_2x1_3bit`, that was developed in Part 1, to design and implement a 3-bit 4x1 MUX as shown in Figure 2. The circuit implements a 4x1 MUX with 3-bit inputs and outputs. The MUX will route X, Y, Z, or W to M depending on the value placed on S0 and S1.
1. Write Verilog code to describe the 4x1 MUX, you should instantiate as many `mux_2x1_3bit` asnecessary. Call the file `mux_4x1_3bit`
2. Verify the functionality of your code by implementing it on the Nexys board using the following IO specifications:
a. SW2 ß SW0 for the input X
b. SW5 ß SW3 for the input Y
c. SW8 ß SW6 for the input Z
d. SW11 ß SW9 for the input W
e. SW15 ß SW14 for the select signal
f. LED2 ß LED0 for the output M
g. LED15 ß LED14 to reflect the status of the select signal
