1. Draw the C-V curves of a MOS capacitor with n-type Si as the substrate, at low frequency and high frequency, respectively. Explain why they are different.
2. Consider an n+ polysilicon gate on silicon dioxide with a p-type silicon substrate doped to Na = 3 × 1016 cm-3. Assume Qss’ = 5 × 1010 cm-2. Determine the required oxide thickness such that the threshold voltage is VTN =+0.65 V. Please provide the process of derivation.
