ECE 380- Lab #8- Code Converters  Solved

 

Design A  
Implement Design A (for the Cyclone® V device) of the pre-lab.  Verify the design correctness by simulating it in Quartus Prime.   

Download and test Design A on the Cyclone® V device. Have the TA verify your results.

•       Use inputs SW[3..0] (Note: SW[0] is the LSB) for the input h3-h0.  

•       Use seven-digit display HEX0 [6..0] (note: HEX1 [0] is the MSB( led0 ) and HEX0[6] is the 

LSB(led6 )) for the LED’s outputs (led0 -led6 ).   

Design B
Implement Design B (for the Cyclone® V device) of the pre-lab.  Verify the design correctness by simulating it in Quartus Prime. Download and test Design B on the Cyclone® V device. You can decide on the pin assignments yourself.  

•       Use inputs SW [3..0] (note: SW[0] is the LSB) for the inputs (h3-h0).  

 
 
 
EXPECTED 
SIMULATED 
DE1 Board 
 
A 
B 
S 
fo 
co 
S 
Fo 
co 
S 
fo 
co 
ADD 
5 
2 
 
 
 
 
 
 
 
 
 
ADD 
8 
F 
 
 
 
 
 
 
 
 
 
ADD 
7 
E 
 
 
 
 
 
 
 
 
 
ADD 
9 
E 
 
 
 
 
 
 
 
 
 
SUB 
E 
F 
 
 
 
 
 
 
 
 
 
SUB 
7 
3 
 
 
 
 
 
 
 
 
 
SUB 
7 
E 
 
 
 
 
 
 
 
 
 
SUB 
E 
4 
 
 
 
 
 
 
 
 
 
•       Use two seven-digit displays HEX1 [6] and HEX0 [6..0] (Note: HEX1 [6] is the MSB and HEX0[6] is the LSB) for the LED’s outputs (led0 -leds7).  

Design C
Implement Design C (for the Cyclone® V device) of the pre-lab.  Verify the design correctness by simulating it in Quartus Prime. Download and test Design C on the Cyclone® V device. You can decide on the pin assignments yourself. Fill out the form below.

•       Use inputs SW [9..6] (note: SW[6] is the LSB) for the X input (X3-X0).  

•       Use inputs SW [5..2] (note: SW[2] is the LSB) for the Y input (Y3-Y0).

•       Use inputs SW [0] for ADD_SUB.

•       Use inputs LEDR [3..0] (note: LEDR[0] is the LSB) for the S output (S3-S0).  

•       Use inputs LEDR [9], LEDR[8] for overflow and Cout.

•       Use two seven digit display HEX5 [6] and HEX4 [6..0] (note: HEX5 [6] is the MSB and HEX4[6] is the LSB) for the outputs (hexx0 -hexx7). Use two seven-digit displays HEX3

[6] and HEX2 [6..0] (again, HEX3 [6] is the MSB and HEX2[6] is the LSB) for the outputs (hexy0 -hexy7). Use two seven-digit displays HEX1 [6] and HEX0 [6..0] (again, HEX1 [6] is the MSB and HEX0[6] is the LSB) for the outputs (hexs0 -hexs7 ).  

Homework #8 (100 points)
 

1)  (20 pts) Draw two implementations of gated SR latches and their characteristic table.  

 

 

2)  (20 pts) Draw a D latch and its characteristic table.  

 

 

3)  (20 pts) Draw a negative-edge-triggered D flip-flop using the master-slave configuration. Draw its characteristic table.  

 

 

4)  (20 pts) Draw a positive-edge-triggered D flip-flop using the master-slave configuration. Draw its characteristic table.  

 

 

5)  (20 pts) Explain the difference between the following pair of concepts: 

 

a)  D latches versus D flip-flops

b)  Basic latches versus gated latches

c)  Asynchronous clear versus synchronous clear

d)  Level sensitive devices versus edge-triggered devices