$30
In Lab #03, you will design, build, and test a multifunctional logic circuit that implements multiple logic functions. You will be using the Quartus II CAD tool to design the circuit or write VHDL codes. When you have compiled your design, download and test your design on Altera’s DE1 board.
Lab procedures:
1. Get your pre-lab initialed by the TA.
2. Using the text editor of Quartus II, compile and simulate your design.
a. Print out vhd and the waveform files.
b. Fill in the data table column vhd with the values that you get from the simulator.
3. Download the design from Step 2 (previous step) to Altera’s Cyclone® DE1 board. Use toggle switches SW[3 … 0] for the four inputs and LEDR[7] for the function output.
a. Verify the design by testing all possible inputs.
b. Fill in the data table column vhd DE1 with the values that you get.
c. Ask the TA to test the logic unit and verify your results.
d. Have the TA initial the resulting data table.
4. Using the block editor of Quartus II, create and simulate your design.
a. Print out the bdf and waveform files.
b. Fill in the data table column bdf with the values that you get from the simulator.
5. Download the design from Step 4 (previous step) to Altera’s Cyclone® DE1 board. Use toggle switches SW[3 … 0] for the four inputs and LEDR[7] for the function output.
a. Verify the design by testing all possible inputs.
b. Fill in the data table column bdf DE1 with the values that you get.
c. Ask the TA to test the logic unit and verify your results.
d. Have the TA initial the resulting data table.
6. Fill in all the values in the truth table before you leave the lab and get them verified by the TA.
Appendix: Download VHDL design or schematics to DE1-SoC
1. Build project
2. Write VHDL code/Construct schematic
3. Select the correct Cyclone V chip: 5CSEMA5F31C6 (VERY IMPORTANT) 4. Compile
5. Go to Assignments-àPin Planner
6. Assign pins, see Page 23 of De1-SoC User Manual for slide switches, page 24 for LEDs
7. Compile again
8. Go to Tools-à Programmerà Hardware Setup-àselect “DE-SoC”
9. Make sure Mode is “JTAG”
10. Click auto-detect
11. Select 5CSEMA5
12. Right click on 5CSEMA5-àadd file-àoutput files-àselect the .sof file
13. Then click on the Program/Configure checkbox on the 5CSEMA5 line
14. Click “Start”
Homework #03 (100 points)
Question 1 (30 pts): Use algebraic manipulation to prove the following Boolean statements.
a) 𝑥𝑥𝑥𝑥 + yz + 𝑥𝑥̅𝑧𝑧 = 𝑥𝑥𝑥𝑥 + 𝑥𝑥̅𝑧𝑧
b) (𝑥𝑥1 + 𝑥𝑥2 + 𝑥𝑥3 + 𝑥𝑥4)(𝑥𝑥1 + 𝑥𝑥2 + 𝑥𝑥3 + 𝑥𝑥̅4) = 𝑥𝑥1 + 𝑥𝑥2 + 𝑥𝑥3
d) (Bonus 10 pts): (𝑥𝑥 + 𝑥𝑥) ∙ (𝑥𝑥 + 𝑧𝑧) ∙ (𝑥𝑥̅ + 𝑧𝑧) = (𝑥𝑥 + 𝑥𝑥) ∙ (𝑥𝑥̅ + 𝑧𝑧)
Question 2 (70 pts): Draw circuits using NMOS transistors to implement each of the functions as shown below.
1) (10 pts) f (x1,x2) = x1 + x2 ;
2) (10 pts) 𝑓𝑓(𝑥𝑥1, 𝑥𝑥2, 𝑥𝑥3 ) = 𝑥𝑥̅1 ∙ 𝑥𝑥̅2 ∙ 𝑥𝑥̅3
3) (20 pts) 𝑓𝑓(𝑥𝑥1, 𝑥𝑥2, 𝑥𝑥3 ) = 𝑥𝑥1 + 𝑥𝑥2 ∙ 𝑥𝑥3 ∙ 𝑥𝑥4 ∙ 𝑥𝑥5
4) (10 pts) 𝑓𝑓(𝑥𝑥1, 𝑥𝑥2, 𝑥𝑥3 ) = 𝑥𝑥1 ∙ 𝑥𝑥2 ∙ 𝑥𝑥3
5) (20 pts) 𝑓𝑓(𝑥𝑥1, 𝑥𝑥2, 𝑥𝑥3, 𝑥𝑥4 ) = 𝑥𝑥̅1 ∙ 𝑥𝑥̅2 ∙ 𝑥𝑥̅3 + 𝑥𝑥̅4 ∙ 𝑥𝑥̅5