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CS382 Lab 7- Nibble Adder Solution

CS 382 Computer Architecture

In this lab, we are going to use Logisim-Evolution to build an adder and a multiplexor.
1 Task 1: Nibble Adder
In class and textbook Chapter 3.1.2.3, we showed a basic one-bit adder, which adds two bits with carry-in flag, and produce a carry-out flag. In this task, you will need to extend this to a nibble adder to add two nibbles together, and of course, produce a result nibble, and a carry-out flag. A relevant example in textbook is a double-word adder (see Figure 3.8).
2 Task 2: 2-Way Nibble Multiplexor
The second task is to build a multiplexor that can choose between two nibbles. Since we have two inputs, we only need one bit of control signal. You can follow Figure 3.6 in the textbook.
3 Testing Your Circuits
To test the circuits, we provide you two test vector files. They enumerate all the possible input as binary as well as the output. On the top menu (or menu bar), choose Simulate, and Test Vector..., and load the corresponding test vector files. Note that the files will work only when you have the correct labels, so do no change the labels – we use the same vector files for grading.
4 Requirements
The requirements apply to both tasks.
You must download the starter file, and write your name and pledge in the .circ files;
You must not change anything in the test vector files;
You must only use basic gates from the Gates menu. Logisim-Evolution does provide existing components such as multiplexor and adder, but you must not use them.
5 Grading
The lab will be graded based on a total of 10 points, 5 for task 1 and 5 for task 2. The following lists deductibles, and the lowest score is 0 – no negative scores:
Task 1:
• -5: used existing adder provided by Logisim;
• -5: if 70% to 100% cases in the test vector file have failed;
• -3: if 30% to 69% cases in the test vector file have failed; • -1: if >0% to 29% cases in the test vector file have failed; • -1: no pledge and/or name.
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Task 2:
• -5: used existing multiplexor provided by Logisim;
• -5: if 70% to 100% cases in the test vector file have failed;
• -3: if 30% to 69% cases in the test vector file have failed; • -1: if >0% to 29% cases in the test vector file have failed;
• -1: no pledge and/or name.
Attendance: check off at the end of the lab to get attendance credit.

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