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CS2110-Homework 03 Arithmetic Logic Units Solved
All computer processors have a very important component known as the Arithmetic Logic Unit (ALU). This component allows the computer to do, as the name suggests, arithmetic and logical operations. For this assignment, you’re going to build an ALU of your own, along with creating some of the gates.
For this assignment you will:
1. Create the standard logic gates (NAND, NOR, NOT, AND, OR)
2. Create an 8-input multiplexer and an 8-output decoder
3. Create a 1-bit full adder
4. Create an 8-bit full adder using the 1-bit full adder
5. Use your 8-bit full adder and other components to construct an 8-bit ALU
1 Instructions
1.1 Requirements
For the first part of this assignment (the logic gates), you may use only those components found in the Wiring tab (being the input/output pins, constants, probes, clocks, splitters, tunnels, and transistors), along with any of the sub-circuits that you create or that already exist.
For the second part of this assignment (the multiplexer and decoder), you may use only those components found in the Wiring and Gates tabs along with any of the sub-circuits that you create or that already exist.
For the third part of this assignment, you may use only those components found in the Wiring and Gates tabs as well as any of the sub-circuits that you create or that already exist. For the ALU specifically, you may use the Plexer tab as well.
Use of anything not listed above will result in heavy deductions. Your need to have everything in their correctly named sub-circuit. More information on sub-circuits is given below.
Use tunnels where necessary to make your designs more readable, but do not overdo it! For gates, muxes, adders and decoders you can often get clean circuits just by placing your components well rather than using tunnels everywhere.
1.2 Part 1: 1-Bit Logic Gates
All of the circuits in this file are in the gates.sim file, and you may use the Wiring tab for this part.
For this part of the assignment, you will create a transitor-level implementation of the NAND, NOT, NOR, AND, and OR logic gates.
Remember for this section that you are only allowed to use the components listed in the Wiring section, along with any of the logic gates you are implementing in CircuitSim. For example, once you implement the NOT gate you are free to use that subcircuit in implementing other logic gates. Implementing the gates in the order of the subcircuit tabs can be the easiest option.
As a brief summary of the behavior of each logic gate:
A
B
A NAND B
A
B
A NOR B
A
B
A AND B
A
B
A OR B
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
0
1
1
0
0
1
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
A
NOT A
0
1
1
0
Hint: Start by creating the NAND gate from transistors. Then use this gate as a subcircuit for implementing the others.
All of the logic gates must be within their named sub-circuits.
1.3 Part 2: Plexers
All of the circuits in this file are in the plexers.sim file, and you may use the Wiring, Gates tabs for this part.
The multiplexer you will be creating has 8 1-bit inputs (labeled appropriately as A, B, C, ..., H), a single 3-bit selection input (SEL), and one 1-bit output (OUT). The multiplexer uses the SEL input to choose a specific input line for forwarding to the output.
For example:
SEL = 000 == OUT = A
SEL = 001 == OUT = B
SEL = 010 == OUT = C
SEL = 011 == OUT = D
SEL = 100 == OUT = E
SEL = 101 == OUT = F
SEL = 110 == OUT = G
SEL = 111 == OUT = H
The decoder you will be creating has a single 3-bit selection input (SEL), and eight 1-bit output (labeled A, B, C, ..., H). The decoder uses the SEL input to raise a specific output line, as seen below.
For example:
SEL = 000 == A = 1, BCDEFGH = 0
SEL = 001 == B = 1, ACDEFGH = 0
SEL = 010 == C = 1, ABDEFGH = 0
SEL = 011 == D = 1, ABCEFGH = 0
SEL = 100 == E = 1, ABCDFGH = 0
SEL = 101 == F = 1, ABCDEGH = 0
SEL = 110 == G = 1, ABCDEFH = 0
SEL = 111 == H = 1, ABCDEFG = 0
1.4 Part 3: Adders & ALUs
All of the circuits in this file are in the alu.sim file, and you may use the Wiring and Gates tabs for this part. For the ALU specifically, you may use the Plexer tab as well.
1.4.1 1-Bit Adder
The full adder has three 1-bit inputs (A, B, and CIN), and two 1-bit outputs (SUM and COUT). The full adder adds A + B + CIN and places the sum in SUM and the carry-out in COUT.
For example:
A = 0, B = 1, CIN = 0 == SUM = 1, COUT = 0
A = 1, B = 0, CIN = 1 == SUM = 0, COUT = 1
A = 1, B = 1, CIN = 1 == SUM = 1, COUT = 1
Hint: Making a truth table of the inputs will help you.
1.4.2 8-Bit Adder
For this part of the assignment, you will daisy-chain 8 of your 1-bit full adders together in order to make an 8-bit full adder.
This circuit should have two 8-bit inputs (A and B) for the numbers you’re adding, and one 1-bit input for CIN. The reason for the CIN has to do with using the adder for purposes other than adding the two inputs.
There should be one 8-bit output for SUM and one 1-bit output for COUT.
1.4.3 8-Bit ALU
You will create an 8-bit ALU with the following operations, using the 8-bit full adder you created in for
2.4.2:
000. Addition [A + B]
001. Subtraction [A - B]
010. 2’s Complement Negation [-A]
011. Multiply by 13 [A * 13]
100. isMultipleOf8 [A % 8 == 0]
101. isPowerOf2 [A == 2n for some n∈N, including 20 = 1]
110. XOR [A XOR B]
111. Constant Output [0x69]
Notice that 2’s Complement Negation, Multiply by 13, isMultipleOf8, and isPowerOf2 only operate on the A input. They should NOT rely on B being a particular value. Likewise, Constant Output does not use either input and should not rely on their value.
This ALU has two 8-bit inputs for A and B and one 3-bit input for OP, the op-code for the operation in the list above. It has one 8-bit output named OUT.
The provided autograder will check the op-codes according to the order listed above (Addition (000), Subtraction (001), etc.) and thus it is important that the operations are in this exact order.
Hint: For check if a number is a power of two, remember your implementation in Homework 2. The best implementation of this is the expression (a 0&&((a&(a−1)) == 0)) which is easy to implement in digital logic.
For this assignment you will:
1. Create the standard logic gates (NAND, NOR, NOT, AND, OR)
2. Create an 8-input multiplexer and an 8-output decoder
3. Create a 1-bit full adder
4. Create an 8-bit full adder using the 1-bit full adder
5. Use your 8-bit full adder and other components to construct an 8-bit ALU
1 Instructions
1.1 Requirements
For the first part of this assignment (the logic gates), you may use only those components found in the Wiring tab (being the input/output pins, constants, probes, clocks, splitters, tunnels, and transistors), along with any of the sub-circuits that you create or that already exist.
For the second part of this assignment (the multiplexer and decoder), you may use only those components found in the Wiring and Gates tabs along with any of the sub-circuits that you create or that already exist.
For the third part of this assignment, you may use only those components found in the Wiring and Gates tabs as well as any of the sub-circuits that you create or that already exist. For the ALU specifically, you may use the Plexer tab as well.
Use of anything not listed above will result in heavy deductions. Your need to have everything in their correctly named sub-circuit. More information on sub-circuits is given below.
Use tunnels where necessary to make your designs more readable, but do not overdo it! For gates, muxes, adders and decoders you can often get clean circuits just by placing your components well rather than using tunnels everywhere.
1.2 Part 1: 1-Bit Logic Gates
All of the circuits in this file are in the gates.sim file, and you may use the Wiring tab for this part.
For this part of the assignment, you will create a transitor-level implementation of the NAND, NOT, NOR, AND, and OR logic gates.
Remember for this section that you are only allowed to use the components listed in the Wiring section, along with any of the logic gates you are implementing in CircuitSim. For example, once you implement the NOT gate you are free to use that subcircuit in implementing other logic gates. Implementing the gates in the order of the subcircuit tabs can be the easiest option.
As a brief summary of the behavior of each logic gate:
A
B
A NAND B
A
B
A NOR B
A
B
A AND B
A
B
A OR B
0
0
1
0
0
1
0
0
0
0
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
0
1
1
0
0
1
0
0
1
0
1
1
1
0
1
1
0
1
1
1
1
1
1
A
NOT A
0
1
1
0
Hint: Start by creating the NAND gate from transistors. Then use this gate as a subcircuit for implementing the others.
All of the logic gates must be within their named sub-circuits.
1.3 Part 2: Plexers
All of the circuits in this file are in the plexers.sim file, and you may use the Wiring, Gates tabs for this part.
The multiplexer you will be creating has 8 1-bit inputs (labeled appropriately as A, B, C, ..., H), a single 3-bit selection input (SEL), and one 1-bit output (OUT). The multiplexer uses the SEL input to choose a specific input line for forwarding to the output.
For example:
SEL = 000 == OUT = A
SEL = 001 == OUT = B
SEL = 010 == OUT = C
SEL = 011 == OUT = D
SEL = 100 == OUT = E
SEL = 101 == OUT = F
SEL = 110 == OUT = G
SEL = 111 == OUT = H
The decoder you will be creating has a single 3-bit selection input (SEL), and eight 1-bit output (labeled A, B, C, ..., H). The decoder uses the SEL input to raise a specific output line, as seen below.
For example:
SEL = 000 == A = 1, BCDEFGH = 0
SEL = 001 == B = 1, ACDEFGH = 0
SEL = 010 == C = 1, ABDEFGH = 0
SEL = 011 == D = 1, ABCEFGH = 0
SEL = 100 == E = 1, ABCDFGH = 0
SEL = 101 == F = 1, ABCDEGH = 0
SEL = 110 == G = 1, ABCDEFH = 0
SEL = 111 == H = 1, ABCDEFG = 0
1.4 Part 3: Adders & ALUs
All of the circuits in this file are in the alu.sim file, and you may use the Wiring and Gates tabs for this part. For the ALU specifically, you may use the Plexer tab as well.
1.4.1 1-Bit Adder
The full adder has three 1-bit inputs (A, B, and CIN), and two 1-bit outputs (SUM and COUT). The full adder adds A + B + CIN and places the sum in SUM and the carry-out in COUT.
For example:
A = 0, B = 1, CIN = 0 == SUM = 1, COUT = 0
A = 1, B = 0, CIN = 1 == SUM = 0, COUT = 1
A = 1, B = 1, CIN = 1 == SUM = 1, COUT = 1
Hint: Making a truth table of the inputs will help you.
1.4.2 8-Bit Adder
For this part of the assignment, you will daisy-chain 8 of your 1-bit full adders together in order to make an 8-bit full adder.
This circuit should have two 8-bit inputs (A and B) for the numbers you’re adding, and one 1-bit input for CIN. The reason for the CIN has to do with using the adder for purposes other than adding the two inputs.
There should be one 8-bit output for SUM and one 1-bit output for COUT.
1.4.3 8-Bit ALU
You will create an 8-bit ALU with the following operations, using the 8-bit full adder you created in for
2.4.2:
000. Addition [A + B]
001. Subtraction [A - B]
010. 2’s Complement Negation [-A]
011. Multiply by 13 [A * 13]
100. isMultipleOf8 [A % 8 == 0]
101. isPowerOf2 [A == 2n for some n∈N, including 20 = 1]
110. XOR [A XOR B]
111. Constant Output [0x69]
Notice that 2’s Complement Negation, Multiply by 13, isMultipleOf8, and isPowerOf2 only operate on the A input. They should NOT rely on B being a particular value. Likewise, Constant Output does not use either input and should not rely on their value.
This ALU has two 8-bit inputs for A and B and one 3-bit input for OP, the op-code for the operation in the list above. It has one 8-bit output named OUT.
The provided autograder will check the op-codes according to the order listed above (Addition (000), Subtraction (001), etc.) and thus it is important that the operations are in this exact order.
Hint: For check if a number is a power of two, remember your implementation in Homework 2. The best implementation of this is the expression (a 0&&((a&(a−1)) == 0)) which is easy to implement in digital logic.
1 file (9.3KB)
