1 Objectives
• Implementation of simple logic functions using NAND gates
• Design, build and test logic functions using the Karnaugh map method
2 Pre-Lab Preparation
Implementation of the simple logic functions with NAND gates
1. Determine 2 ways to implement an inverter with a 2-input NAND gate.
2. Implement a 3-input NAND gate function using 2-input NAND gates only, draw schematics.
3. Implement a 2-input OR function using 2-input NAND gates only, draw schematics.
4. (A) Implement the function 𝑍 = 𝑓(𝐴, 𝐵) = (𝐴 + 𝐵)𝐴𝐵 using one 2-input OR gate, one 2input AND gate and one 2-input NAND gate.
(B) Implement the same function 𝑍 with only NAND gates.
(C) Make up the truth table for the function. What is the common name of this function? (D) Expand and simplify the Boolean equation to express 𝑍 as a sum of products. Implement the sum of products using only NAND gates. Note: It is possible to do so with 4 NAND gates and no additional inverters.
3 Laboratory Work
Customized Functions:
𝐹1 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 11,12) 𝐹10 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10,14, 15)
𝐹2 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 11,13) 𝐹11 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,12, 13)
𝐹3 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 11,14) 𝐹12 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,12, 14)
𝐹4 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 11,15) 𝐹13 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,12, 15)
𝐹5 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 12,13) 𝐹14 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,13, 14)
𝐹6 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 12,14) 𝐹15 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,13, 15)
𝐹7 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 12,15) 𝐹16 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 11,14, 15)
𝐹8 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 13,14) 𝐹17 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 12,13, 14)
𝐹9 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 10, 13,14) 𝐹18 = ∑( [𝑙𝑎𝑠𝑡 4 𝑑𝑖𝑔𝑖𝑡𝑠] , 12,14, 15)
Tutorial:
