(Part-1) Design an Arithmetic Logic Unit (ALU) that has two 8-bit inputs and an 8-bit output. The ALU is shown on the left side of Figure 1. The ALU functions and the flags that will be updated (i.e., - means that the flag will not be affected and √ means that the flag changes based on the OutALU) are given on the right side of Figure 1:
• FunSel selects the function of the ALU.
• OutALU shows the result of the operation that is selected by FunSel and applied on A and/or B inputs.
• Z (zero) bit is set if OutALU is zero (e.g., NOT B is zero).
• C (carry) bit is set if OutALU sets the carry (e.g., LSL A produces carry).
• N (negative) bit is set if the ALU operation generates a negative result (e.g., A–B results in a negative number).
• O (overflow) bit is set if an overflow occurs (e.g., A+B results in an overflow).
• Note that Z|C|N|O flags are stored in a register!
FunSel
OutALU
Z
C
N
O
0000
0001
A
B
0010
0011
NOT A NOT B
0100
0101 0110
A + B
A + B + Carry
A - B
0111
1000 1001
A AND B
A OR B
A XOR B
1010 1011
1100
1101 1110
1111
LSL A
LSR A
ASL A
ASR A CSL A
CSR A
OutALU Register
Figure 1: The ALU (Left) and its characteristic table (Right)
(Circular | Arithmetic | Logical) Shift (Left | Right) operations are depicted in Figure 2, Figure 3, and Figure 4.
Figure 2: Circular Shift Operations
Figure 3: Logical Shift Operations
Figure 4: Arithmetic Shift Operations
(Part-2) Implement the organization in Figure 5. Please note that, the whole system uses the same single clock.
IR (0-7)
IR (8-15)
MuxASel
MuxAOut
00
01
10
11
IROut (0-7)
Memory Output
Address Register OutC
OutALU
MuxBSel
MuxBOut
00
01
10
11
ɸ
IROut (0-7)
Memory Output
OutALU
MuxCSel
MuxCOut
0
1
MuxAOut
OutA
Figure 5: ALU System
