BLG222-Project 1 Solved

In this project, registers and register files will be designed and implemented. It has 3 parts.

Design each part as a library unit, so that it can be reused in other parts and next projects. You can use any available combinational/sequential logisim units in your projects. 

(Part-1) Design 2 different types of registers: (1) 8-bit register and (2) 16-bit register. These registers have 4 functionalities that are controlled by 2-bit control signals (FunSel) and an enable input (E).  

The graphic symbol of the registers and the characteristic table is shown in Figure 1. Symbol

𝜙 means don’t care. Build these registers as a library in logisim software so that you can use them in Part-2.

 
 
 
 
0
ɸ
Q
(Retain Value)
1
00
0
(Clear)
1

1 1
01

10 11
I

Q+1 Q-1
(Load)

(Increment)

(Decrement)
                                           I             E    FunSel        Q+

                          E   FunSel      Q

Figure 1: Graphic symbol of the registers (Left) and the characteristic table (Right)
 

(Part-2) Design a register file (a structure that contains many registers) that works as follows.

 

(Part-2a) Design the system shown in Figure 2 which consists of four 8-bit general purpose registers: R0, R1, R2, and R3. The details of inputs and outputs are as follows.

 

Figure 2: 8-bit general purpose registers, inputs, and outputs
OutASel and OutBSel are used to feed output lines OutA and OutB, respectively. 8 bits of the selected registers are output to OutA and OutB. Figure 3 shows selection of output registers based on the OutASel and OutBSel control inputs.  

 

OutASel
Output A
00
R0
01
R1
10
R2
11
R3
 
 

OutBSel
Output B
00

01

10 11
R0

R1

R2 R3
 
Figure 3: OutASel and OutBSel controls
RegSel (Figure 4) is a 4-bit signal that selects the registers to apply the function that is determined by FunSel (Figure 5) signal.

RegSel
Enabled Registers
0000
N0 register is enabled, All registers retain their values
0001
Only R0 is enabled, Function selected by FunSel will be applied to R0
0010
Only R1 is enabled, Function selected by FunSel will be applied to R1
0011
R0 and R1 are enabled, Function selected by FunSel will be applied to R0 and R1
0100
Only R2 is enabled, Function selected by FunSel will be applied to R2
0101
R0 and R2 are enabled, Function selected by FunSel will be applied to R0 and R2
0110
R1 and R2 are enabled, Function selected by FunSel will be applied to R1 and R2
0111
R0, R1 and R2 are enabled, Function selected by FunSel will be applied to R0, R1 and R2
1000
Only R3 is enabled, Function selected by FunSel will be applied to R3
1001
R0 and R3 are enabled, Function selected by FunSel will be applied to R0 and R3
1010
R1 and R3 are enabled, Function selected by FunSel will be applied to R1 and R3
1011
R0, R1 and R3 are enabled, Function selected by FunSel will be applied to R0, R1 and R3
1100
R2 and R3 are enabled, Function selected by FunSel will be applied to R2 and R3
1101
R0, R2 and R3 are enabled, Function selected by FunSel will be applied to R0, R2 and R3
1110
R1, R2 and R3 are enabled, Function selected by FunSel will be applied to R1, R2 and R3
1111
R0, R1, R2 and R3 are enabled, Function selected by FunSel will be applied to R0, R1, R2 and R3
Figure 4:RegSel Control Input
+

FunSel
Rx
 
00
0
(Clear)
01 10

11
I

Rx+1

Rx-1
(Load)

(Increment)

(Decrement)
Figure 5: FunSel Control Input
 

For example: If RegSel is 1001 and FunSel is 10, then the registers R0 and R3 will be incremented with next clock cycle. R1 and R2 will not be affected since they are not enabled by RegSel.

(Part-2b) Design the system shown in Figure 6 which consists of three 8-bit address registers: PC, AR, and SP.  FunSel and Regsel works as in Part-2a.

 

Figure 6: 8-bit address registers, inputs, and outputs
OutCSel and OutDSel are used to feed output lines OutC and OutD, respectively. 8 bits of the selected registers are output to OutC and OutD. Figure 7 shows selection of output registers based on the OutCSel and OutDSel control inputs.  

 

OutCSel
Output C
00 01 10

11
PC

AR

SP

PC
 
 

OutDSel
Output D
00 01 10

11
PC

AR SP

PC
 
Figure 7: OutCSel and OutDSel controls
 

(Part-2c) Design an 16-bit IR register whose graphic symbol and characteristic table are given in Figure 8.

 This register can store 16 bit binary numbers. However, the input of this register file is only 8 bits. Hence, using the 8 bit input you can load either the lower (bits 7-0) or higher (bits 15-8) half. This is determined by 𝑳/𝑯  signal.  

 

Figure 8: Graphic symbol of the IR register (Left) and its characteristic table (Right)